1. Field of the Invention
This invention relates to a method of producing an asymmetrical semiconductor device using angled ion implantation techniques. More specifically, this invention relates to a method of placing shallow ion implants under one side of a structure on a semiconductor surface, such as the gate of a field effect transistor.
2. Description of Related Art
Semiconductor devices, such as metal oxide semiconductor field effect transistors (MOSFETs), produced with angled ion implantation techniques are often constructed symmetrically. This allows great flexibility in the layout of multiple devices as the source and drain are interchangeable (and both sides of the gate are consequently referred to simply as the "source/drain").
For some applications, this type of device symmetry is highly desirable or essential. Further, uncontrolled device asymmetry is objectionable and for these reasons, devices produced by angled ion implantation are generally made symmetric by rotating the semiconductor to allow the angled implant beam to implant from all sides of the gate. This results in a series of symmetrical implants and a symmetrical device.
However, for certain applications performance can be improved if the semiconductor device is constructed asymmetrically. One particular example of this is in the construction of semiconductor devices with angled ion implantation techniques employing a lightly doped drain (LDD) region or a halo region. The LDD is desirable on the drain side of a MOSFET, and a halo is desirable on the source side of the MOSFET gate. However, a symmetrical device with an LDD on the drain side has an LDD region on the source side of the gate as well. A symmetrical device with a halo on the source has one on the drain side as well.
The addition of an LDD region degrades device performance through increased series resistance and overlap capacitance. Since the lightly doped LDD region is strictly required only on the drain side of the device to mitigate hot carrier degradation, the LDD on the source side of a symmetrical device adds undesired series resistance and capacitance. Device performance can be improved if the LDD implant could be blocked from the source side thereby making an asymmetrical device. Where a particular device is never subjected to high voltages, blocking the LDD implant from both ends may also advantageous.
The LDD implant is often created by an implant normal to the semiconductor surface. The energy and dose are chosen so as to produce the desired effect. In order to produce multiple asymmetric devices, a very accurately-aligned critical mask capable of blocking the implant beam from the source side, but not blocking it from the drain side, must be used.
Alternatively, the LDD implant may be produced through an angled ion implant beam which places the implant under one side of the gate. Thus, the desired LDD is formed when the appropriate ion implant beam is directed at an angle towards the drain side of the gate. To produce multiple asymmetrical devices on the same semiconductor substrate requires that all of the devices be oriented in the same direction so that a single ion implant step can produce all of the LDD regions desired.
To achieve symmetry, angled ion implants are normally applied with four rotations. Only one of the four rotations, however, will primarily establish the desired LDD or halo implant for any particular device. This is because only one of the four directions will allow the ions to implant underneath the desired edge of the gate. Of the remaining three rotations, two will be approximately parallel to the sides of the gate and will fail to penetrate underneath the edge of the gate as is necessary to form the implant. The last of the four rotations will produce the undesired implant on the opposite side of the gate from the desired implant.
It can be seen that controlled device asymmetry is possible if all the devices are oriented in the same direction and the opposite direction rotation is omitted. Alternatively, a critical mask may be used to protect the half of the gate that should not receive an implant. Neither of these options, however, is particularly desirable. Orienting all of the devices in the same direction significantly limits layout flexibility. On the other hand, the gate dimension is generally as small as it is feasible to construct. To block the implant on one side, but not on the other side of the gate requires aligning a critical mask to within the width of the gate. This has required alignment tolerance within one half the width of the gate. Obtaining such critical alignment is an expensive and error-prone procedure.
The same problem is encountered when constructing a halo implant only on the source side of the device. If the halo implant is placed on the drain side, it increases junction capacitance and peak electric field. Achieving halo implants only on the source side has heretofore required the same choice between an expensive critical mask with alignment comparable to half the gate width or the uniform device orientation such that all of the devices have the source on the same side.
In view of the limitations on layout flexibility or the cost of using a critical mask, it has heretofore been preferable to accept the reduced performance from a symmetrical device having an undesired LDD region on the source side of the device and an undesired halo region on the drain side of the device.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to retain layout flexibility by permitting any desired device orientation, while allowing the use of a non-critical mask to form asymmetrical semiconductor devices.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.